cpphdl-verilator-rtl
cpphdl-verilator-rtl is an Embedded, IoT & robotics skill for AI agents, published by mirekez in the cpphdl repository on GitHub. Skillspace rates cpphdl-verilator-rtl F (45/100) and the safety scan rated it risky; the rating is based on static analysis only.
Risky. This skill has patterns associated with unsafe behaviour. Read the source carefully before running it.
Use when writing or debugging CppHDL tests that mix C++ testbench models with Verilated RTL, especially reset ordering, register inputs, AXI4 responder wiring, eval sequencing, _assign/_strobe discipline, and avoiding C++/SystemVerilog simulation mismatches.
- Grade
- F
- Quality
- 45 / 100
- Safety
- Risky
- GitHub stars
- 48
Unproven: rated by static analysis only, not yet compared head-to-head.
This rating describes the version of the repository we crawled; it may have changed since.
Our review
- Architecture
- 100 / 100
- Maturity
- Basic: a single SKILL.md
- Security scan
- High-risk patterns
- License
- Apache-2.0
- Adoption
- Adopted by 0 other repositories, in 0 collections
What the scanner flagged
- dynamic code execution (eval/exec)
Not checked yet
- Category is a classifier prediction; no model has read this skill yet
- Not judged on the rubric yet (not a contender in its category)
- No blind task eval yet
- Scope (portable / vendor / repo-internal) not assessed; only the top of each category is read for scope
- Sibling files (scripts, references) not fetched; security scan covers SKILL.md only
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