instruction-latency-audit

instruction-latency-audit is a Runtime diagnostics & profiling skill for AI agents, published by tenstorrent in the tt-metal repository on GitHub. Skillspace rates instruction-latency-audit D (64/100) and it passed the safety scan; the rating is based on static analysis only.

Audit hand-written Tensix/SFPU instruction sequences for missing pipeline-latency padding — where a dependent instruction consumes a multi-cycle-latency result before it is ready and a NOP (or independent-instruction spacing) is required. Use after touching any raw TTI_SFP*/TTI_* sequence, ckernel_sfpu_* kernels, or hand-assembled instruction streams. NOT a cross-thread race — an intra-thread micro-architectural hazard.

Grade
D
Quality
64 / 100
Safety
Passed
GitHub stars
1,583

Unproven: rated by static analysis only, not yet compared head-to-head.

Our two independent classifiers differ on this skill's category, so treat the placement as provisional.

This rating describes the version of the repository we crawled; it may have changed since, so go by its current files.

Our review

Architecture
100 / 100
Maturity
Basic: a single SKILL.md
Security scan
Low-risk patterns
License
Apache-2.0
Adoption
Adopted by 0 other repositories, in 0 collections

What the scanner flagged

  • mentions secrets in text

Not checked yet

  • Category is a classifier prediction; no model has read this skill yet
  • Not judged on the rubric yet (not a contender in its category)
  • No blind task eval yet
  • Scope (portable / vendor / repo-internal) not assessed; only the top of each category is read for scope
  • Sibling files (scripts, references) not fetched; security scan covers SKILL.md only

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