riscv-privileged

riscv-privileged is an Embedded, IoT & robotics skill for AI agents, published by mohitmishra786 in the low-level-dev-skills repository on GitHub. Skillspace rates riscv-privileged D (68/100) and it passed the safety scan; the rating is based on static analysis only.

RISC-V privileged architecture skill for M/S/U modes and traps. Use when handling CSRs, trap handlers, PLIC/CLINT interrupts, OpenSBI integration, page tables Sv39/Sv48, or QEMU virt testing. Activates on queries about RISC-V privileged, mstatus, mtvec, satp, OpenSBI, PLIC, or Sv39.

Grade
D
Quality
68 / 100
Safety
Passed
GitHub stars
133

Unproven: rated by static analysis only, not yet compared head-to-head.

This rating describes the version of the repository we crawled; it may have changed since, so go by its current files.

Our review

Architecture
100 / 100
Maturity
Basic: a single SKILL.md
Security scan
No issues found
License
MIT
Adoption
Adopted by 0 other repositories, in 0 collections

Not checked yet

  • Not judged on the rubric yet (not a contender in its category)
  • No blind task eval yet
  • Scope (portable / vendor / repo-internal) not assessed; only the top of each category is read for scope
  • Sibling files (scripts, references) not fetched; security scan covers SKILL.md only

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