vitis-hls-synthesis
vitis-hls-synthesis is an Embedded, IoT & robotics skill for AI agents, published by Shinei-Nouzen-Arch in the FPGA-Agent repository on GitHub. Skillspace rates vitis-hls-synthesis C (79/100) and it passed the safety scan; the rating is based on static analysis only.
Vitis HLS synthesis assistant for C/C++ to RTL conversion. Covers kernel development, pragma optimization, interface configuration, and synthesis report analysis. For post-synthesis implementation use vivado-impl, for timing analysis use vivado-analysis, for hardware debug use vivado-debug.
- Grade
- C
- Quality
- 79 / 100
- Safety
- Passed
- GitHub stars
- 152
Unproven: rated by static analysis only, not yet compared head-to-head.
This rating describes the version of the repository we crawled; it may have changed since, so go by its current files.
Our review
- Architecture
- 97 / 100
- Maturity
- Structured: ships references or scripts
- Security scan
- No issues found
- License
- GPL-2.0
- Adoption
- Adopted by 1 other repositories, in 1 collections
- Scope
- Vendor-specific: built around one product. Vitis HLS synthesis workflow, a public toolchain
Not checked yet
- Not judged on the rubric yet (not a contender in its category)
- No blind task eval yet
- Sibling files (scripts, references) not fetched; security scan covers SKILL.md only
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