xe2-nbarrier-pipelining
xe2-nbarrier-pipelining is a Go, Rust & systems languages skill for AI agents, published by ModelTC in the LightX2V repository on GitHub. Skillspace rates xe2-nbarrier-pipelining D (59/100) and it passed the safety scan; the rating is based on static analysis only.
Named barrier (nbarrier) split-barrier pipelining patterns for Intel Xe2 (Lunar Lake/LNL, Battlemage/BMG) GPU. Xe2 is the GPU architecture; LNL and BMG are product names. SYCL ESIMD kernels. Covers arrive/wait split barriers for latency hiding, the ESIMD nbarrier API, producer-consumer patterns, and proven pipelining recipes from high-performance SDP kernels. Use this skill whenever the user mentions named barriers, split barriers, nbarrier, barrier_arrive, barrier_wait, latency hiding with barriers, pipelining independent operations across a sync point, or overlapping memory loads with barrier synchronization on Intel GPU.
- Grade
- D
- Quality
- 59 / 100
- Safety
- Passed
- GitHub stars
- 2,499
Unproven: rated by static analysis only, not yet compared head-to-head.
Our two independent classifiers differ on this skill's category, so treat the placement as provisional.
This rating describes the version of the repository we crawled; it may have changed since, so go by its current files.
Our review
- Architecture
- 84 / 100
- Maturity
- Basic: a single SKILL.md
- Security scan
- No issues found
- License
- Apache-2.0
- Adoption
- Adopted by 0 other repositories, in 0 collections
Not checked yet
- Not judged on the rubric yet (not a contender in its category)
- No blind task eval yet
- Scope (portable / vendor / repo-internal) not assessed; only the top of each category is read for scope
- Sibling files (scripts, references) not fetched; security scan covers SKILL.md only
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